Job Description
Meta
ASIC Engineer
Full -Time
Bengaluru, India
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Bachelor's degree in Computer Science
Freshers
1. Computer Architecture coursework that has covered concepts such as microprocessor architecture, memory systems and on-chip interconnection networks.
2. Familiarity with C, C++, Python or other Object Oriented Programming Languages.
3. Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.
4. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
1. Implement and analyze advanced algorithms and architectures for video transcode and machine learning SoCs.
2. Analyze and map data center workloads to ASIC architecture
3. develop performance and functional models at different levels of abstraction to validate the architecture.
4. Work with a broad array of cross functional partners in ASIC design, verification, silicon bring-up, firmware and software development to ensure the successful production deployment of the SoCs.
5. Implement architecture documentation and other collateral necessary for the use and integration of your designs.
You will have an opportunity to work with experts in the domain of video transcode, AI/ML and other technologies to evaluate algorithms, develop functional and performance models and help architect state-of-the art hardware accelerator ASICs.
